03323nam a22004935i 4500001001800000003000900018005001700027007001500044008004100059020003700100024003500137050001800172072001700190072002300207072001600230100008200246245013900328250001800467264006900485300006600554336002600620337002600646338003600672347002400708505037100732520114401103650003202247650003802279650002802317650003402345650004402379650002902423650003602452700008202488710003402570773002602604776003602630776003602666776003602702856004602738912001402784912001402798999001702812978-3-031-37924-6DE-He21320251030110814.0cr nn 008mamaa230911s2024 sz | s |||| 0|eng d a97830313792469978-3-031-37924-67 a10.1007/978-3-031-37924-62doi 4aTK7867-7867.5 7aTJFC2bicssc 7aTEC0080102bisacsh 7aTJFC2thema1 aRai, Shubham.eauthor.4aut4http://id.loc.gov/vocabulary/relators/aut96598910aDesign Automation and Applications for Emerging Reconfigurable Nanotechnologiesh[electronic resource] /cby Shubham Rai, Akash Kumar. a1st ed. 2024. 1aCham :bSpringer Nature Switzerland :bImprint: Springer,c2024. aXXIV, 210 p. 70 illus., 41 illus. in color.bonline resource. atextbtxt2rdacontent acomputerbc2rdamedia aonline resourcebcr2rdacarrier atext filebPDF2rda0 aChapter 1. Introduction -- Chapter 2. Preliminaries -- Chapter 3. Exploring Circuit Design Topologies for RFETs -- Chapter 4. Standard Cells and Technology Mapping -- Chapter 5. Logic Synthesis with XOR-Majority Graphs -- Chapter 6. Physical synthesis flow and liberty generation -- Chapter 7. Polymporphic Primitives for Hardware Security -- Chapter 8. Conclusion. aThis book is a single-source solution for anyone who is interested in exploring emerging reconfigurable nanotechnology at the circuit level. It lays down a solid foundation for circuits based on this technology having considered both manual as well as automated design flows. The authors discuss the entire design flow, consisting of both logic and physical synthesis for reconfigurable nanotechnology-based circuits. The authors describe how transistor reconfigurable properties can be exploited at the logic level to have a more efficient circuit design flow, as compared to conventional design flows suited for CMOS. Further, the book provides insights into hardware security features that can be intrinsically developed using the runtime reconfigurable features of this nanotechnology. Details an entire design automation flow for building circuits based on emerging reconfigurable nanotechnology; Describes logical abstraction for emerging reconfigurable nanotechnology that is essential for building newer circuits; Presents hardware security solutions that use reconfigurable nanotechnology to complement contemporary CMOS circuits. 0aElectronic circuits.965535 0aEmbedded computer systems.964625 0aMicroprocessors.959300 0aComputer architecture.96599014aElectronic Circuits and Systems.96553624aEmbedded Systems.96599124aProcessor Architectures.9659921 aKumar, Akash.eauthor.4aut4http://id.loc.gov/vocabulary/relators/aut9659932 aSpringerLink (Online service)0 tSpringer Nature eBook08iPrinted edition:z978303137923908iPrinted edition:z978303137925308iPrinted edition:z978303137926040uhttps://doi.org/10.1007/978-3-031-37924-6 aZDB-2-ENG aZDB-2-SXE c56278d56278