03918nam a22005655i 4500 978-3-031-38230-7 DE-He213 20251030110815.0 cr nn 008mamaa 230915s2024 sz | s |||| 0|eng d 9783031382307 978-3-031-38230-7 10.1007/978-3-031-38230-7 doi TK7867-7867.5 TJFC bicssc TEC008010 bisacsh TJFC thema Jain, Vikram. author. aut http://id.loc.gov/vocabulary/relators/aut 66036 Towards Heterogeneous Multi-core Systems-on-Chip for Edge Machine Learning [electronic resource] : Journey from Single-core Acceleration to Multi-core Heterogeneous Systems / by Vikram Jain, Marian Verhelst. 1st ed. 2024. Cham : Springer Nature Switzerland : Imprint: Springer, 2024. XXIII, 186 p. 93 illus., 83 illus. in color. online resource. text txt rdacontent computer c rdamedia online resource cr rdacarrier text file PDF rda Chapter 1: Introduction -- Chapter 2 Algorithmic Background for Machine Learning -- Chapter 3 Scoping the Landscape of (Extreme) Edge Machine Learning Processors -- Chapter 4 Hardware-Software Co-optimization through Design Space Exploration -- Chapter 5 Energy Efficient Single-core Hardware Acceleration -- Chapter 6 TinyVers: A Tiny Versatile All-Digital Heterogeneous Multi-core System-on-Chip -- Chapter 7 DIANA: Digital and ANAlog Heterogeneous Multi-core System-on-Chip -- Chapter 8 Networks-on-chip to Enable Large-scale Multi-core ML Acceleration -- Chapter 9 Conclusion. This book explores and motivates the need for building homogeneous and heterogeneous multi-core systems for machine learning to enable flexibility and energy-efficiency. Coverage focuses on a key aspect of the challenges of (extreme-)edge-computing, i.e., design of energy-efficient and flexible hardware architectures, and hardware-software co-optimization strategies to enable early design space exploration of hardware architectures. The authors investigate possible design solutions for building single-core specialized hardware accelerators for machine learning and motivates the need for building homogeneous and heterogeneous multi-core systems to enable flexibility and energy-efficiency. The advantages of scaling to heterogeneous multi-core systems are shown through the implementation of multiple test chips and architectural optimizations. Discusses the need for scaling to multi-core systems for machine learning and several architectural and software optimizations; Covers single-core, homogeneous and heterogeneous multi-core Systems-on-chip for machine learning applications; Discusses the benefits of heterogeneity in the context of machine learning. . Electronic circuits. 65535 Embedded computer systems. 64625 Machine learning. 55059 Microprocessors. 59300 Computer architecture. 66037 Electronic Circuits and Systems. 65536 Embedded Systems. 66038 Machine Learning. 55059 Processor Architectures. 66039 Verhelst, Marian. author. aut http://id.loc.gov/vocabulary/relators/aut 66040 SpringerLink (Online service) Springer Nature eBook Printed edition: 9783031382291 Printed edition: 9783031382314 Printed edition: 9783031382321 https://doi.org/10.1007/978-3-031-38230-7 ZDB-2-ENG ZDB-2-SXE 56286 56286