Ranjbar, Behnaz. creator author. aut http://id.loc.gov/vocabulary/relators/aut Ejlali, Alireza. author. aut http://id.loc.gov/vocabulary/relators/aut Kumar, Akash. author. aut http://id.loc.gov/vocabulary/relators/aut SpringerLink (Online service) text sz 2024 1st ed. 2024. monographic eng

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access XVIII, 194 p. 69 illus., 67 illus. in color. online resource. This book addresses the challenges associated with efficient Mixed-Criticality (MC) system design. We focus on application analysis through execution time analysis and task scheduling analysis in order to execute more low-criticality tasks in the system, i.e., improving the Quality-of-Service (QoS), while guaranteeing the correct execution of high-criticality tasks. Further, this book addresses the challenge of enhancing QoS using parallelism in multi-processor hardware platforms. Provides an overview of the state-of-the-art in Mixed-Criticality research, related to Quality-of-Service improvement; Describes a novel theoretical approach to obtaining Worst-Case Execution Times (WCETs); Utilizes machine learning models and objective optimization techniques to improve the resource utilization and QoS. . Introduction -- Preliminaries and Literature Reviews -- Bounding Time in Mixed-Criticality Systems -- Safety- and Task-Drop-Aware Mixed-Criticality Task Scheduling -- Learning-Based Drop-Aware Mixed-Criticality Task Scheduling -- Fault-Tolerance and Power-Aware Multi-Core Mixed-Criticality System Design -- QoS- and Power-Aware Run-Time Scheduler for Multi-Core Mixed-Criticality Systems -- Conclusion. by Behnaz Ranjbar, Alireza Ejlali, Akash Kumar. Electronic circuits Embedded computer systems Electronic circuit design Electronic Circuits and Systems Embedded Systems Electronics Design and Verification TK7867-7867.5 9783031389603 https://doi.org/10.1007/978-3-031-38960-3 https://doi.org/10.1007/978-3-031-38960-3 230926 20251030110818.0 978-3-031-38960-3