03434nam a22004815i 4500001001800000003000900018005001700027007001500044008004100059020003700100024003500137050001300172072001600185072001600201072002300217072001500240072001500255245021800270250001800488264006900506300006500575336002600640337002600666338003600692347002400728490005900752505105100811520056601862650002302428650004102451700008102492700008202573710003402655773002602689776003602715776003602751830005902787856004602846912001402892912001502906912001402921999001702935978-3-031-62874-0DE-He21320251030112324.0cr nn 008mamaa240621s2024 sz | s |||| 0|eng d a97830316287409978-3-031-62874-07 a10.1007/978-3-031-62874-02doi 4aTK5102.9 7aTJF2bicssc 7aUYS2bicssc 7aTEC0670002bisacsh 7aTJF2thema 7aUYS2thema10aDesign and Architectures for Signal and Image Processingh[electronic resource] :b17th International Workshop, DASIP 2024, Munich, Germany, January 17–19, 2024, Proceedings /cedited by Tiago Dias, Paola Busia. a1st ed. 2024. 1aCham :bSpringer Nature Switzerland :bImprint: Springer,c2024. aXVI, 123 p. 48 illus., 39 illus. in color.bonline resource. atextbtxt2rdacontent acomputerbc2rdamedia aonline resourcebcr2rdacarrier atext filebPDF2rda1 aLecture Notes in Computer Science,x1611-3349 ;v146220 a -- Specialized Hardware Architectures for Signal and Image Processing. -- A Highly Configurable Platform for Advanced PPG Analysis. -- sEMG-based Gesture Recognition with Spiking Neural Networks on Low-power FPGA. -- Scalable FPGA Implementation of Dynamic Programming for Optimal Control of Hybrid Electrical Vehicles. -- Optimization Approaches for Efficient Deployment of Signal and Image Processing Applications. -- Wordlength Optimization for Custom Floating-point Systems. -- An Initial Framework for Prototyping Radio-Interferometric Imaging Pipelines. -- Scratchy: A Class of Adaptable Architectures with Software-Managed Communication For Edge Streaming Applications. -- Digital Signal Processing Design for Reconfigurable Systems. -- Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications. -- Improving the Energy Efficiency of CNN Inference on FPGA using Partial Reconfiguration. -- Optimising Graph Representation for Hardware Implementation of Graph Convolutional Networks for Event-based Vision. aThis book constitutes the refereed proceedings of the 17th International Workshop on Design and Architecture for Signal and Image Processing, DASIP 2024, held in Munich, Germany, during January 17–19, 2024. The 9 full papers presented in this book were carefully reviewed and selected from 21 submissions. The workshop provided an inspiring international forum for the latest innovations and developments in the fields of leading signal, image, and video processing and machine learning in custom embedded, edge, and cloud computing architectures and systems. 0aSignal processing.14aSignal, Speech and Image Processing.1 aDias, Tiago.eeditor.4edt4http://id.loc.gov/vocabulary/relators/edt9790821 aBusia, Paola.eeditor.4edt4http://id.loc.gov/vocabulary/relators/edt9790832 aSpringerLink (Online service)0 tSpringer Nature eBook08iPrinted edition:z978303162873308iPrinted edition:z9783031628757 0aLecture Notes in Computer Science,x1611-3349 ;v1462240uhttps://doi.org/10.1007/978-3-031-62874-0 aZDB-2-SCS aZDB-2-SXCS aZDB-2-LNC c60902d60902